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Alfred M. SzmidtCalling all <a href="https://mastodon.social/tags/HDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#HDL</a> hackers! I need help in putting the <a href="https://mastodon.social/tags/MIT" class="mention hashtag" rel="nofollow noopener" target="_blank">#MIT</a> <a href="https://mastodon.social/tags/CADR" class="mention hashtag" rel="nofollow noopener" target="_blank">#CADR</a> onto a FPGA board. <a href="https://mastodon.social/tags/VHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#VHDL</a>, <a href="https://mastodon.social/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a>, does not matter much. Who is up for a fun challange? <a href="https://mastodon.social/tags/LispMachine" class="mention hashtag" rel="nofollow noopener" target="_blank">#LispMachine</a>

Clash LanguageTime for my <a href="https://fosstodon.org/tags/introduction" class="mention hashtag" rel="nofollow noopener" target="_blank">#introduction</a> to the Fediverse! :masto_love: Clash is an open source functional hardware description language built on <a href="https://fosstodon.org/tags/Haskell" class="mention hashtag" rel="nofollow noopener" target="_blank">#Haskell</a>. The Clash compiler allows you to use Haskell features like its strong and powerful typesystem as well as use existing Haskell code and libraries in your <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> and <a href="https://fosstodon.org/tags/ASIC" class="mention hashtag" rel="nofollow noopener" target="_blank">#ASIC</a> designs! You can test your designs right inside the REPL, simulate it alongside other Haskell code or output <a href="https://fosstodon.org/tags/VHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#VHDL</a> / <a href="https://fosstodon.org/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a> / <a href="https://fosstodon.org/tags/SystemVerilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#SystemVerilog</a> code for synthesis.Links in the profile ✨

PipelineCFantastic work from <a href="https://fosstodon.org/@suarezvictor" class="u-url mention" rel="nofollow noopener" target="_blank">@suarezvictor</a> using CFlexHDL for C++ code into hardware with PipelineC! <a href="https://fosstodon.org/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://fosstodon.org/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://fosstodon.org/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> <a href="https://fosstodon.org/tags/computergraphics" class="mention hashtag" rel="nofollow noopener" target="_blank">#computergraphics</a>Donut running hardware-only (no CPU). Automatically translated from C to VHDL with CflexHDL and PipelineC Runs at 640x480 (60FPS) on the Arty-35T board. Original project by Andy Sloane @a1k0n. Thanks to @pipelinec_hdl, <a href="https://fosstodon.org/@BrunoLevy01" class="u-url mention" rel="nofollow noopener" target="_blank">@BrunoLevy01</a>, @samsoniuk, @iquilezles, @splinedrive and all!<a href="https://x.com/suarezvictor/status/1718664669051678786?s=20" rel="nofollow noopener" translate="no" target="_blank">https://x.com/suarezvictor/status/1718664669051678786?s=20</a>

YosysHQNot convinced that Formal Verification is worth it? Try our ‘getting started with FV’ package.Including 2 hours of tailored video support to make sure you start getting value fast.* Industrial compliant language support includes <a href="https://fosstodon.org/tags/SystemVerilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#SystemVerilog</a>, <a href="https://fosstodon.org/tags/VHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#VHDL</a> & SVA* Bundled verification IP includes <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#RISCV</a> and AXI* Access to all our tools including synthesis, <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a>, and mutation coverageJust 1800 euros for 3 months. To get started, book a call with our CSO Matt Venn.<a href="https://lnkd.in/dyD7eez9" rel="nofollow noopener" target="_blank">https://lnkd.in/dyD7eez9</a>

PipelineCHave you fine Mastodon folks seen this awesome work?First ever raytraced game thats not software? 1080p realtime, interactive, fixed+float point, 3D vector math, no CPU, no instructions, autopipelined in <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a>! @suarezvictor's fantastic work w/ CflexHDL + PipelineC! <a href="https://fosstodon.org/tags/raytracing" class="mention hashtag" rel="nofollow noopener" target="_blank">#raytracing</a> <a href="https://fosstodon.org/tags/graphics" class="mention hashtag" rel="nofollow noopener" target="_blank">#graphics</a> <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> <a href="https://fosstodon.org/tags/gamedev" class="mention hashtag" rel="nofollow noopener" target="_blank">#gamedev</a> <a href="https://fosstodon.org/tags/hdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#hdl</a> <a href="https://fosstodon.org/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://fosstodon.org/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://fosstodon.org/tags/eda" class="mention hashtag" rel="nofollow noopener" target="_blank">#eda</a><a href="https://youtu.be/hn3sr3VMJQU" rel="nofollow noopener" translate="no" target="_blank">https://youtu.be/hn3sr3VMJQU</a>

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